Use of an SDB is a requirement of technology scaling. An SDB can be used to reduce the circuit area to enable the formation of high-density integrated circuits. However, SDB formation is very challenging with little process margin. The SDB must cover both edges of the active area. In current SDB designs, the gate spacers must cover the active area edges. Enlarging the gate would cause active area to active area leakage. One attempt to form an SDB with sufficient edge coverage includes a SDB formed in a silicon (Si) substrate using a hard mask, as depicted in FIGS. 1 through 4. Adverting to FIG. 1, a structure 101, e.g., formed of silicon oxide (SiO2), is formed in a Si substrate 103. A hard mask 105, e.g., formed of silicon nitride (SiN), is then formed over the structure 101 and the Si substrate 103. An opening 107 above the structure 101 is then formed in the hard mask 105 using a lithography mask (not shown for illustrative convenience), as depicted in FIG. 2. The opening 107 enables a portion of the Si substrate 103 to be removed and, therefore, a corresponding portion of the structure 101 to be revealed. Adverting to FIG. 3, a structure 109, e.g., formed of the same material as the structure 101, is deposited over the structure 101 and then planarized, e.g., by chemical mechanical polishing (CMP), down to the hard mask 105. Thereafter, the hard mask 105 is removed and the resulting SDB structure 111 is formed, as depicted in FIG. 4. However, such designs can cause damage to the fin of the Si substrate 103 due to the selectivity of SiO2 to Si, which has the risk of fin to dummy gate (PC) short.
A need therefore exists for methodology enabling formation of a SDB with robust isolation characteristics and/or formation of a SDB with fewer lithography masks and, therefore, lower cost and the resulting devices.